Electromigration Modeling at Circuit Layout Level by Cher Ming Tan,Feifei He

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By Cher Ming Tan,Feifei He

built-in circuit (IC) reliability is of accelerating situation in present-day IC know-how the place the interconnect disasters considerably raises the failure expense for ICs with reducing interconnect size and lengthening variety of interconnect degrees. Electromigration (EM) of interconnects has now turn into the dominant failure mechanism that determines the circuit reliability. This short addresses the readers to the need of 3D genuine circuit modelling on the way to review the EM of interconnect method in ICs, and the way they could create such types for his or her personal functions. A third-dimensional (3D) electro-thermo-structural version in place of the traditional present density established 2-dimensional (2D) types is gifted at circuit-layout level.

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Electromigration Modeling at Circuit Layout Level (SpringerBriefs in Applied Sciences and Technology)

Built-in circuit (IC) reliability is of accelerating crisis in present-day IC know-how the place the interconnect disasters considerably raises the failure cost for ICs with reducing interconnect size and extending variety of interconnect degrees. Electromigration (EM) of interconnects has now turn into the dominant failure mechanism that determines the circuit reliability.

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